A memory cell may particularly denote any physical realization of a building unit of a computer data storage device which may be used for storing one or more bits. Volatile memory cells, such as for instance random access memory (RAM) cells, particularly dynamic random access memory (DRAM) cells, require power to maintain the stored information, whereas non-volatile memory cells, such as for instance flash memory cells, can retain the stored information even when not powered. Conventional DRAM memory cells comprise a select transistor and a storage capacitor and may be referred to as one transistor—one capacitor memory cells. Performance specifications on the used transistors and capacitor can put serious constrains on the optimization of DRAMs with respect to the speed, density and/or costs.
Z-RAM memory cells that are examples of so called one transistor—zero capacitor DRAM memory cells, i.e. which do not comprise a separate capacitor, rely on an effect known as the floating body effect, which causes capacitance to be formed between the transistor and an underlying insulating substrate.
U.S. Pat. No. 5,608,250 discloses a volatile memory cell, where the charge is stored locally at the interface between a silicon substrate and a gate dielectric.
US 2007/0034922 discloses a volatile/non-volatile memory cell with a vertical surround gate. A gate insulator stack is formed as a stack of three layers: a tunnel insulator layer, a charge blocking layer and a charge trapping layer positioned between the tunnel insulator layer and the charge blocking layer.
Known volatile memory cells may be difficult and expensive to integrate in reliable high speed and high density DRAMs.